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Workshop: Leverage Automatic HDL code generation with MATLAB and Simulink

Seminar Overview

Engineers are using MATLAB and Simulink to design and verify complex algorithms for applications such as signal processing, communications, image processing, and control design.

In this workshop, we will demonstrate how you can leverage automatic HDL code generation and verification on different levels of abstraction to accelerate your FPGA design and ASIC prototyping workflow. We will also illustrate how these technologies can be integrated into your existing design workflows.

You will get hands-on experience with:

  • MATLAB to HDL workflow
  • Simulink to HDL workflow